Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures

Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures

Coarse-grained reconfigurable architectures deliver high performance and energy efficiency for computationally intensive applications like mobile multimedia and wireless communication. This paper deals with the aspect of power-efficient dynamic reconfiguration control techniques in such architectures. Proper clock domain partitioning with custom clock gating combined with automatic clock gating...

Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures

The paper focuses on coarse-grained dynamically reconfigurable array architectures promising performance and flexibility for different challenging application areas, e. g. future broadband mobile communication systems. Here, new and flexible microelectronic architectures are required solving various problems that stem from access mechanisms, energy conservation, error rate, transmission speed c...

Coarse-Grained Reconfigurable Array Architectures

Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same inner loops that benefit from the high ILP support in VLIW architectures. By executing non-loop code on other cores, however, CGRAs can focus on such loops to execute them more efficiently. This chapter discusses the basic principles of CGRAs, and the wide range of design options available to a CGRA designer, covering ...

Dynamic coarse grained reconfigurable architectures

Coarse grained reconfigurable processors have gained more popularity in the last years, as they introduce a new way for a dynamic and programmable execution similar to FPGA and tend to achieve the performance of application specific hardware. The reconfigurability on instruction level grants these architectures a big dynamicity and ability to embrace the diversity of the applications. Neverthel...

Multi-core Architectures with Coarse-grained Dynamically Reconfigurable Processors for Broadband Wireless Access Technologies